ISRO & SCL develops 32-bit Microprocessors for space applications

Bengaluru, March 16. The first production lots of the 32-bit microprocessors developed for space applications, VIKRAM3201 & KALPANA3201, were handed over to Dr. V. Narayanan, Secretary, DOS /Chairman, ISRO by Mr. S Krishnan, Secretary, MeitY, in a function organised at New Delhi by the Semiconductor Laboratory (SCL), Chandigarh.

These microprocessors were designed & developed by the Vikram Sarabhai Space Centre of ISRO in collaboration with SCL, Chandigarh. Dr. Unnikrishnan Nair, Director, Vikram Sarabhai Space Centre, also participated in the function along with the design teams.

Dr. Kamaljeet Singh, Director-General of SCL/MeitY and his team provided a brief overview of the activities undertaken for the realization, packaging & qualification of these processors for launch vehicle applications.

VIKRAM3201 is the first fully “Make-in-India” 32-bit microprocessor that is qualified for use in the harsh environmental conditions of launch vehicles. The processor was fabricated at the 180nm CMOS semiconductor fab of SCL. This processor is an advanced version of the indigenously designed 16-bit VIKRAM1601 microprocessor which has been flying in the Avionics system of ISRO’s launch vehicles since 2009. A “Make-in-India” version of the VIKRAM1601 processor was subsequently inducted in 2016 after the 180nm semiconductor fab was established at SCL, Chandigarh.

VIKRAM3201 & the VIKRAM1601 has a custom Instruction Set Architecture, with floating-point computation capability and high-level language support for the Ada language. All the software tools such as the Ada compiler, assembler, linker, simulator along with Integrated Development Environment (IDE) are developed in-house by ISRO. A C language compiler is also under development for providing more flexibility to users in other domains.

This is the first of its kind in India and has enabled Atmanirbharta in the area of high reliability microprocessors and onboard computers for navigation, guidance & control of launch vehicles.

The initial lot of VIKRAM3201 devices was successfully validated in space in the Mission Management Computer of the PSLV Orbital Experimental Module (POEM-4) in the PSLV-C60 mission.

KALPANA3201 is a 32-bit SPARC V8 RISC microprocessor and is based on the IEEE 1754 Instruction Set Architecture. The microprocessor has been designed to be compatible with open-source software toolsets along with in-house developed simulator & IDE and has been tested with flight software.

Four other devices that were jointly developed with SCL were also handed over towards significant miniaturisation of the launch vehicle Avionics system.

This includes two versions of a Reconfigurable Data Acquisition System (RDAS) integrating multiple indigenously designed 24-bit Sigma-Delta Analog to Digital Converters on a single chip along with a Relay driver Integrated Circuit & a Multi-Channel Low Drop-out Regulator Integrated Circuit for high reliability applications.

An MoU was also signed between SCL & Vikram Sarabhai Space Centre of ISRO for the development & delivery of miniaturized unsteady pressure sensors for measuring dynamic pressure in wind tunnels.